IBM, Lam Research team up to boost sub-1nm logic scaling.

NewsIBM, Lam Research team up to boost sub-1nm logic scaling.

IBM and Lam Research Corp. have joined forces in a collaboration to develop cutting-edge materials, advanced processes, and High-NA EUV lithography techniques to pave the way for future logic nodes. This collaboration, announced on March 10, 2026, aims to propel IBM’s logic scaling roadmap forward by focusing on innovation in materials, fabrication processes, and lithography techniques.

For over a decade, IBM and Lam have worked together to advance logic fabrication, leading to breakthroughs in 7nm, nanosheet, and EUV process technologies. With this new five-year agreement, the companies are setting their sights on pushing the boundaries of logic scaling to the sub-1nm node. The collaborative efforts will concentrate on developing new materials, enhancing etch and deposition capabilities for complex device architectures, and refining High-NA EUV lithography processes to enable next-generation interconnect and device patterning.

Mukesh Khare, GM of IBM Semiconductors and VP of Hybrid Cloud at IBM Research, expressed enthusiasm about expanding the collaboration to tackle the challenges of High-NA EUV lithography and sub-1nm nodes. This partnership builds on past successes, including the development of nanosheet technology and the unveiling of the world’s first 2nm node chip by IBM in 2021.

Vahid Vahedi, chief technology and sustainability officer at Lam Research, highlighted the importance of rethinking materials, processes, and lithography as an integrated system in the era of 3D scaling. The collaboration aims to drive breakthroughs in High-NA EUV dry resist and processes, facilitating the development of lower power and higher performance transistors crucial for the AI era.

The collaboration between IBM and Lam Research will leverage IBM’s advanced research capabilities at the NY Creates Albany NanoTech Complex and Lam’s state-of-the-art process tools and innovations. These include Aether® dry resist technology, Kiyo® and Akara® etch platforms, Striker® and ALTUS® Halo deposition systems, and advanced packaging technologies. Together, the teams will validate full process flows for nanosheet and nanostack devices, as well as backside power delivery. These efforts are aimed at ensuring the reliable transfer of High-NA EUV patterns into real device layers with high yield, leading to continued scaling, improved performance, and viable pathways to production for future logic devices.

Lam Research Corporation is a leading global provider of innovative wafer fabrication equipment and services to the semiconductor industry. Their technology plays a vital role in enabling customers to build smaller and better-performing devices, with nearly every advanced chip today being built with Lam technology. IBM, on the other hand, is a global leader in hybrid cloud and AI solutions, helping clients worldwide leverage data insights, streamline processes, reduce costs, and gain a competitive edge in their industries.

The collaboration between IBM and Lam Research represents a significant step towards advancing logic scaling and enabling the development of cutting-edge technologies for future semiconductor devices. By combining their expertise and resources, the two companies are poised to drive innovation in materials, processes, and lithography, setting the stage for the next generation of high-performance computing.
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Neil S
Neil S
Neil is a highly qualified Technical Writer with an M.Sc(IT) degree and an impressive range of IT and Support certifications including MCSE, CCNA, ACA(Adobe Certified Associates), and PG Dip (IT). With over 10 years of hands-on experience as an IT support engineer across Windows, Mac, iOS, and Linux Server platforms, Neil possesses the expertise to create comprehensive and user-friendly documentation that simplifies complex technical concepts for a wide audience.
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